Musings on I2C

I posted this on the Microchip website too...

I've gone and created a logic trace of the I2C conversation between an I2C master (on a PC) and an I2C peripheral. I consider the PIC16F88 documentation to be misleading as regards I2C slave implementation. The pictures below show each side of the conversation - the bits are only valid within the red squares as I only set them at the start and end of the ISR. The transitions you see at the start and end don't exist - they likely happen earlier:

I2C Receiver: Data is being sent to the PIC:

I2C Transmitter: Data is being sent from the PIC:

Some notes on this...

Below is attached my notes on the I2C process and pseudo code. There are some interesting traps for the unwary. One is the race condition between clearing BF and checking for an overflow. You should do it in that order - clear BF, check overflow. Note that an overflow condition introduces another pending IRQ:

PIC16F88 SSP I2C Slave pseudo code